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IS24C02C
2K-bit 2-WIRE SERIAL CMOS EEPROM with Special Write-Protection Modes
PRELIMINARY INFORMATION MARCH 2008
FEATURES
* Two-WireSerialInterface,I2CTM compatible - Bidirectional data transfer protocol - 400 kHz transfer rate * Organization: -256x8-bit * DataProtectionFeatures -WriteProtectPin -PermanentSoftwareProtection -ReversibleSoftwareProtection * 16-BytePageWriteBuffer -PartialPage-writespermitted * LowPowerCMOSTechnology - Standby Current less than 1 A (1.7V) - Active Current less than 3 mA (3.6V) * LowVoltageOperation:1.7Vto3.6V * RandomorSequentialReadModes * FilteredInputsforNoiseSuppression * SelftimedWritecycle(5msmax.) * HighReliability -Endurance:1,000,000Cycles -DataRetention:40Years * Industrialtemperaturerange * Packages:SOIC,TSSOP,PDIP,MSOPandDFN * Lead-free
DESCRIPTION
TheIS24C02CisanelectricallyerasablePROMdevice thatusestheindustry-standardI2C communication protocol.TheIS24C02Ccontainsanon-volatilememory arrayof2,048-bits(256bytes),andisfurthersubdivided into16pagesof16byteseachforPage-writemode. Thedeviceoperatesoverthevoltagerangeof1.7Vto 3.6Vtosatisfythevoltagerequirementsoflowvoltage applications.InnormalReadorWriteoperations,a masterdevicecommunicateswiththeEEPROMviathe twowiresSerialClockandSerialData.Optionally,the firsthalfofthearraycanbewrite-protectedwitheither a permanent or reversible software command, or the entirearraycanbewrite-protectedwiththeWPinput pin.TheIS24C02Chasthreeaddresspins,allowingup toeightdevices(ormemorymodules)tobeuniquely accessibleinasystem.Tominimizeboardreal-estate, IS24C02Cisavailableinthepackages:SOIC(8), TSSOP(8),PDIP(8),MSOP(8)andDFN(8).
Copyright (c) 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
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IS24C02C
FUNCTIONAL BLOCK DIAGRAM
Vcc
HIGH VOLTAGE GENERATOR, TIMING & CONTROL
SDA WP SLAVE ADDRESS REGISTER & COMPARATOR A0 A1 A2 WORD ADDRESS COUNTER
X DECODER
SCL
CONTROL LOGIC
00H-7FH ARRAY 80H-FFH
Y DECODER
GND nMOS
ACK
Clock DI/O
>
DATA REGISTER
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IS24C02C
PIN CONFIGURATION 8-Pin TSSOP
8-Pin SOIC, PDIP, MSOP
8-pad DFN
A0 A1 A2 GND
1 2 3 4
8 7 6 5
VCC WP SCL SDA
A0 A1 A2 GND
1 2 3 4
8 7 6 5
VCC WP SCL SDA
A0 1 A1 2 A2 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA
(Top View)
PIN DESCRIPTIONS
A0-A2 SDA SCL WP Vcc GND AddressInputs SerialAddress/DataI/O SerialClockInput WriteProtectInput PowerSupply Ground
WP
WPistheWriteProtectpin.IftheWPpinistiedtoVcc,the entirearraybecomesWriteProtected,andsoftwarewriteprotectioncannotbeinitiated.WhenWPistiedtoGND or left floating, normal read/write operations are allowed tothedevice.Ifthedevicehasalreadyreceivedawriteprotectioncommand,thememoryintherangeof00h-7Fh isread-onlyregardlessofthesettingoftheWPpin.
SCL
Thisinputclockpinisusedtosynchronizethedatatransfer to and from the device.
DEVICE OPERATION
The IS24C02C features a serial communication and supportsabi-directional2-wirebustransmissionprotocol called I2CTM.
SDA
TheSDAisaBi-directionalpinusedtotransferaddresses anddataintoandoutofthedevice.TheSDApinisan opendrainoutputandcanbewireOr'edwithotheropen drainoropencollectoroutputs.TheSDAbusrequires a pullup resistor to Vcc.
2-WIRE BUS
Thetwo-wirebusisdefinedasaSerialDataline(SDA),and aSerialClockline(SCL). Theprotocoldefinesanydevice thatsendsdataontotheSDAbusasatransmitter,and thereceivingdeviceasareceiver. Thebusiscontrolledby MasterdevicewhichgeneratestheSCL,controlsthebus accessandgeneratestheStopandStartconditions. The IS24C02C is the Slave device on the bus.
A0, A1, A2
TheA0,A1,andA2arethedeviceaddressinputsthat are hardwired or left unconnected for hardware flexibility. Whenpinsarehardwired,asmanyaseightdevicesmay beaddressedonasinglebussystem.Whenthepinsare not hardwired, the default values of A0, A1, and A2 are zero.
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IS24C02C
The Bus Protocol:
- Datatransfermaybeinitiatedonlywhenthebusisnot busy - Duringadatatransfer,theSDAlinemustremainstable whenevertheSCLlineishigh. AnychangesintheSDA linewhiletheSCLlineishighwillbeinterpretedasa Start or Stop condition. ThestateoftheSDAlinerepresentsvaliddataafteraStart condition.TheSDAlinemustbestableforthedurationof theHighperiodoftheclocksignal. ThedataontheSDA linemaybechangedduringtheLowperiodoftheclock signal. Thereisoneclockpulseperbitofdata. Eachdata transfer is initiated with a Start condition and terminated with a Stop condition.
DEVICE ADDRESSING
The Master begins a transmission by sending a Start condition. The Master then sends the address of the particularSlavedevicesitisrequesting.TheSlavedevice (Fig.5)addressis8bits. ThefourmostsignificantbitsoftheSlavedeviceaddress are fixed as 1010 for normal read/write operations, and 0110forpermanentwrite-protectionoperations. Thisdevicehasthreeaddressbits(A1,A2,andA0)that allowuptoeightIS24C02Cdevicestosharethe2-wire bus. Upon receiving the Slave address, the device compares the three address bits with the hardwired A2, A1, and A0 input pins to determine if it is the appropriateSlave.IfanyoftheA2-A0pinsisneither biasedtoHighnorLow,internalcircuitrydefaultsthe valuetoLow. ThelastbitoftheSlaveaddressspecifieswhetheraRead orWriteoperationistobeperformed.Whenthisbitisset to 1, a Read operation is selected, and when set to 0, a Writeoperationisselected. AftertheMastertransmitstheStartconditionandSlave addressbyte(Fig.5),theappropriate2-wireSlave(eg. IS24C02C)willrespondwithACKontheSDAline.The SlavewillpulldowntheSDAontheninthclockcycle, signalingthatitreceivedtheeightbitsofdata.The selectedIS24C02CthenpreparesforaReadorWrite operation by monitoring the bus.
Start Condition
TheStartconditionprecedesallcommandstothedevice andisdefinedasaHightoLowtransitionofSDAwhen SCLisHigh. TheIS24C02CmonitorstheSDAandSCL lines and will not respond until the Start condition is met.
Stop Condition
TheStopconditionisdefinedasaLowtoHightransition ofSDAwhenSCLisHigh.Alloperationsmustendwith a Stop condition.
Acknowledge (ACK)
After a successful data transfer, each receiving device is requiredtogenerateanACK. TheAcknowledgingdevice pullsdowntheSDAline.
Reset
TheIS24C02Ccontainsaresetfunctionincasethe 2-wirebustransmissionisaccidentallyinterrupted(eg.a powerloss),orneedstobeterminatedmid-stream.The resetiscausedwhentheMasterdevicecreatesaStart condition.Todothis,itmaybenecessaryfortheMaster devicetomonitortheSDAlinewhilecyclingtheSCLup toninetimes.(ForeachclocksignaltransitiontoHigh, theMasterchecksforaHighlevelonSDA.)
Standby Mode
Power consumption is reduced in standby mode. The IS24C02Cwillenterstandbymode:a)AtPower-up,and remaininituntilSCLorSDAtoggles;b)FollowingtheStop signalifnowriteoperationisinitiated;orc)Followingany internal write operation
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IS24C02C
WRITE OPERATION Byte Write
IntheByteWritemode,theMasterdevicesendstheStart condition and the Slave address information (with the R/W set to Zero) to the Slave device. After the Slave generates anACK,theMastersendsabyteaddressthatiswritten into the address pointer of the IS24C02C. After receiving anotherACKfromtheSlave,theMasterdevicetransmits the data byte to be written into the address memory location. The IS24C02C acknowledges once more and theMastergeneratestheStopcondition,atwhichtimethe devicebeginsitsinternalprogrammingcycle. Whilethis internal cycle is in progress, the device will not respond toanyrequestfromtheMasterdevice.
WRITE PROTECTION Hardware Write Protection
TheIS24C02Chastwoformsofsoftwarewriteprotection and one form of hardware write protection. All are optional.Thehardwarewriteprotectionisenabledwhen theWPinputisheldHigh.Inthiscase,theentirearray oftheIS24C02Cisread-onlyregardlessofthestatus ofthesoftwareprotection.Thehardwareprotectionis disabledwhentheWPinputisheldLoworisfloating.In thiscase,theupperhalfofthearray(80h-FFh)canbe modifiedbyavalidWritecommand,andthelowerhalf of the array (00h-7Fh) can be modified only if software write protection has not been enabled.
Page Write
TheIS24C02Ciscapableof16-bytePage-Writeoperation. APage-WriteisinitiatedinthesamemannerasaByte Write,butinsteadofterminatingtheinternalWritecycle afterthefirstdatabyteistransferred,theMasterdevicecan transmit up to 15 more bytes. After the receipt of each data byte,theIS24C02CrespondsimmediatelywithanACK onSDAline,andthefourlowerorderdatabyteaddress bits are internally incremented by one, while the higher order bits of the data byte address remain constant. If a byte address is incremented from the last byte of a page, itreturnstothefirstbyteofthatpage.IftheMasterdevice should transmit more than 16 bytes prior to issuing the Stop condition, the address counter will "roll over," and the previously written data will be overwritten. Once all 16 bytes are received and the Stop condition has been sent bytheMaster,theinternalprogrammingcyclebegins.At this point, all received data is written to the IS24C02C in a singleWritecycle.Allinputsaredisableduntilcompletion oftheinternalWritecycle.
Reversible Software Write Protection
Thereisanon-volatileflagforeachofthetwoformsof softwarewriteprotection.Whenthebitvalueforeither flag or both flags is 1, it is not possible to modify the contents of the lower 128 bytes of the array (00h-7Fh). If the bit value for both flags is 0, it is possible to modifythishalfofthearraywithavalidWritecommand, assumingWPisheldLoworisfloating.Thedeviceis shippedwithbothflagscleared.Oneofthoseflagsisthe ReversibleSoftwareWriteProtection(RSWP)flag,and canbechangedwiththeSetRSWPandClearRSWP commands.Theflagcanalsobeverifiedwithoutbeing changedwithaReadSWPcommand.Inordertoset, clearorreadtheRSWP,theIS24C02Cinputpinsmust beasfollows:A0mustbeheldtoanextrahighvoltage ofVHV(seeDCCharacteristics),whileA2andA1must besetHigh,Low,orleftfloating,dependingonthedesiredcommand(seeFigure5).Oncetheseinputconditions are met, a command can be issued to the device. Thereversiblesoftwarecommandsareinitiatedsimilarly toanormalbytewriteoperation;however,theslave deviceaddressbeginswiththebitvalues0110.The next three bits are A2 = 0, A1 = 0 or 1, and A0 = 1, so that they logically match the values on the input pins. If the last bit of the slave device address (R/W) is 0, the RSWPflagcanbeClearedorSet.IfR/W is 1, the flag canbeverifiedwiththeReadSWPcommand.Following thisbit,thedevicerespondswitheitherACKorNoACK, depending on the exact command and the flag status (seeTable1:ReversibleInstructions).Tocompletethe SetRSWPorClearRSWPcommand,theMastermust
Acknowledge (ACK) Polling
Thedisablingoftheinputscanbeusedtotakeadvantage ofthetypicalWritecycletime. OncetheStopconditionis issuedtoindicatetheendofthehost'sWriteoperation,the IS24C02CinitiatestheinternalWritecycle.ACKpolling canbeinitiatedimmediately. ThisinvolvesissuingtheStart conditionfollowedbytheSlaveaddressforaWriteoperation. IftheIS24C02CisstillbusywiththeWriteoperation,no No Acknowledge (NoACK) will be returned. If the IS24C02C has completed theWrite operation, an ACK will be returned and the host can then proceed with the nextReadorWriteoperation.
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IS24C02C
transmit a dummy address byte, a dummy data byte, andaStopsignal.ToactuallymodifytheRSWPflag, WPshouldbeheldLoworbefloatingduringentirecommandsequence.Beforeresuminganyothercommand, theinternalwritecycletimeshouldbeobserved.To completetheReadSWPStatusorReadCWPStatus command,theMastercantransmitaStopsignalafter theACK/NoACK.TheWPinputisnotevaluatedforthe ReadSWPStatusorReadCSPStatuscommands.
Permanent Software Write Protection
TheIS24C02Ccontainsapermanentsoftwarewrite protection(PSWP)feature.Ifthenon-volatilePSWP flaghasabitvalueof1,thearrayregionof00h-7Fhis protectedfrommodification.IfthePSWPflaghasabit value of 0, the write protection for the lower half of the arrayisdeterminedsolelybythestatusesofRSWPand theWPinput.AfterthePSWPflagissetto1viathe PermanentWriteProtectcommand,theprotectedarea becomesirreversiblyread-onlydespitepowerremoval andre-applicationonthedevice.Onceenabled,the permanent protection is independent of the status of the WPpin. ThePermanentSoftwareWriteProtectcommandis initiatedsimilarlytoanormalbytewriteoperation; however, the slave device address begins with the bit valuesof0110(seeFigure5).Thefollowingthreebits areA2-A0, so that they logically match the values on the input pins.Thelastbitoftheslaveaddress(R/W) is 0.TheIS24C02CrespondswitheitherACKorNoACK, dependingontheflagstatus(seeTable1:Permanent Instructions).AssuminganACKisreceived,Master thenmustcompletethesequencebytransmittinga dummy address byte, dummy data byte, and a Stop signal(seeFigure11).TheWPpinshouldbeheldLowor left floating during the entire command. Before resuming any other command, the internal write cycle should be observed. ThestatusofthePSWPcanbesafelydeterminedwithout any changes by transmitting the same slave address as above, but with the last bit (R/W) setto1(seeFigure 12).IfthePSWPhasbeenset,theIS24C02Cwillnot acknowledge any slave address starting with bits 0110 (seeFigure5).Tocompletethecommand,theMaster cantransmitaStopsignalaftertheACK/NoACK.
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IS24C02C
TABLE 1 Normal Instructions
Command Read Write Write Write Write Write PSWP (Permanent) X 0 X 1 X X RSWP (Reversible) X 0 X X 1 X WP1 X 0 1 X X 0 ACK Command ACK ACK ACK ACK ACK ACK Address 00h-FFh 00h-FFh 00h-FFh 00h-7Fh 00h-7Fh 80h-FFh ACK Address ACK ACK ACK ACK ACK ACK Data Byte DataByte DataByte DataByte DataByte DataByte DataByte Data Byte ACK ACK ACK ACK ACK ACK ACK Write Cycle No Yes No No No Yes
Permanent Instructions
Command PSWP (Permanent) ReadPSWPStatus4 0 1 0 1 0 1 RSWP (Reversible) X X X X X X WP1 X X 0 0 1 1 ACK Command ACK NoACK ACK NoACK ACK NoACK Address Dummy Address -- Dummy Address -- Dummy Address -- ACK Address ACK -- ACK -- ACK -- Data Byte Dummy Byte -- Dummy Byte -- Dummy Byte -- Data Byte ACK ACK -- ACK -- ACK -- Write Cycle No No Yes No No No
ReadPSWPStatus SetPSWP SetPSWP SetPSWP SetPSWP
Reversible Instructions
Command PSWP (Permanent) ReadSWPStatus4 X X 0 1 X X X X 0 1 0 1 RSWP (Reversible) 0 1 X X 0 1 0 1 X X X X WP1 X X X X 0 0 1 1 0 0 1 1 ACK Command ACK NoACK ACK NoACK ACK NoACK ACK NoACK ACK NoACK ACK NoACK Address Dummy Address -- Dummy Address -- Dummy Address -- Dummy Address -- Dummy Address -- Dummy Address -- ACK Address ACK -- ACK -- ACK -- ACK -- ACK -- ACK -- Data Byte Dummy Byte -- Dummy Byte -- Dummy Byte -- Dummy Byte -- Dummy Byte -- Dummy Byte -- Data Byte ACK ACK -- ACK -- ACK -- ACK -- ACK -- ACK -- Write Cycle No No No No Yes No No No Yes No No No
ReadSWPStatus ReadCWPStatus3,4 ReadCWPStatus3 SetRSWP SetRSWP SetRSWP SetRSWP ClearRSWP ClearRSWP ClearRSWP ClearRSWP
Notes: 1.WP=1ifinputlevelisHigh.WP=0ifinputlevelisGNDorfloating. 2.X=Don'tCare. 3.ReadCWPStatusyieldsthesameresultasReadPSWPStatus. 4.ReadoutDon'tCareDummyAddressandDummyDataisoptional.

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IS24C02C
READ OPERATION
Read operations are initiated in the same manner as Writeoperations,exceptthatthe(R/W) bit of the Slave address is set to "1". There are three Read operation options:currentaddressread,randomaddressreadand sequentialread.
Sequential Read
Sequential Reads can be initiated as either a Current Address Read or Random Address Read. After the IS24C02C sends the initial byte sequence, the Master devicerespondswithanACKindicatingitrequiresadditional data from the IS24C02C. The IS24C02C continues to output data for each ACK received. The Master device terminatesthesequentialReadoperationbypullingSDA High (no ACK) indicating the last data byte to be read, followed by a Stop condition. Thedataoutputissequential,withthedatafromaddressn followedbythedatafromaddressn+1,...etc. Theaddress counter increments by one automatically, allowing the entire memorycontentstobeseriallyreadduringsequentialRead operations. Whenthememoryaddressboundary255is reached, the address counter "rolls over" to address 0, andtheIS24C02CcontinuestooutputdataforeachACK received.(RefertoFigure10.SequentialReadOperation StartingwithaRandomAddressReadDiagram.)
Current Address Read
TheIS24C02Ccontainsaninternaladdresscounter which maintains the address of the last byte accessed, incrementedbyone. Forexample,iftheprevious operationiseitheraReadorWriteoperationaddressed to the address location n, the internal address counter wouldincrementtoaddresslocationn+1. Whenthe IS24C02CreceivestheDeviceAddressingBytewitha Read operation (R/W bit set to "1"), it will respond an ACKandtransmitthe8-bitdatabytestoredataddress locationn+1. TheMastershouldnotacknowledge the transfer but should generate a Stop condition so the IS24C02C discontinues transmission. If the last byte of the memory was the previous access, the data fromlocation'0'willbetransmitted.(RefertoFigure8. CurrentAddressReadDiagram.)
Random Address Read
SelectiveReadoperationsallowtheMasterdevicetoselect atrandomanymemorylocationforaReadoperation. The Master device first performs a 'dummy'Write operation by sending the Start condition, Slave address and word address of the location it wishes to read. After the IS24C02Cacknowledgesthewordaddress,theMaster device resends the Start condition and the Slave address, this time with the R/Wbitsettoone. TheIS24C02Cthen respondswithitsACKandsendsthedatarequested. The Master device does not send an ACK but will generate a Stop condition. (Refer to Figure 9. Random Address ReadDiagram.)
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IS24C02C
Figure 1. Typical System Bus Configuration
Vcc
SDA SCL
Master Transmitter/ Receiver
IS24C02C
Figure 2. Output Acknowledge
SCL from Master
1
8
9
Data Output from Transmitter
tAA tAA
Data Output from Receiver
ACK
Figure 3. Start and Stop Conditions
SDA
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START Condition
SCL
STOP Condition
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IS24C02C
Figure 4. Data Validity Protocol
Data Change
SCL
Data Stable Data Stable
SDA
Figure 5. Command Configuration
Pin Connection1 A2 A2 A1 A1 A0 A0
BIT
Slave Device Address
7 6 5 4 3 2 1 0
1
0
1
0
A2
A1
A0
R/W
Normal Instruction2 Permanent Write Protection Instruction2 Set Write Protection (SWP) Clear Write Protection (CWP) Read SWP
A2
A1
A0
0
1
1
0
A2
A1
A0
R/W
GND GND VHV
0
1
1
0
0
0
1
0
GND
Vcc
VHV
0
1
1
0
0
1
1
0
GND GND VHV
0
1
1
0
0
0
1
1
GND
Vcc
VHV
0
1
1
0
0
1
1
1
Read CWP
Note: 1. A2-A0 input pin connections must be GND (or floating), Vcc, or VHV. 2. Bits 1, 2, and 3 of the device address will be compared with the values on the external pins.
Figure 6. Byte Write
S T A R T Device Address W R I T E* A C K L S B R/W
SDA Bus Activity
Word Address
*
A C K
Data
S T O *P A C K
M S B
M S B
* Acknowledges provided by the slave regardless of hardware or software Write Protection.
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IS24C02C
Figure 7. Page Write
S T A R T W R I T E * Word Address (n) * A A C C K K L S B R/W S T O *P A C K
SDA Bus Activity
Device Address
Data (n)
* A C K
Data (n+1)
* A C K
Data (n+15)
M S B
* Acknowledges provided by the slave regardless of hardware or software Write Protection.
Figure 8. Current Address Read
S T A R T R E A D A C K M S B L S B R/W N O A C K S T O P
SDA Bus Activity
Device Address
Data
Figure 9. Random Address Read
S T A R T W R I T E S T A R T
Device Address
Word Address (n) A C K A C K
Device Address
SDA Bus Activity
R E A D
Data n A C K N O A C K
S T O P
M S B
L S B R/W DUMMY WRITE
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IS24C02C
Figure 10. Sequential Read
R E A D A C K S T O P
Device Address SDA Bus Activity
Data Byte n A C K
Data Byte n+1 A C K
Data Byte n+2 A C K
Data Byte n+X
N O R/W A C K
Figure 11. SET PERMANENT WRITE PROTECTION
S T A R T W R I Device T Data Address E * Word Address A A A C # # ## # # # #C # # # ## # # # C K K K M L M S S S B B B R/W S T O P
SDA Bus Activity
* The slave does not provide an acknowledgement if the permanent write protection is already enabled. # Don't care bits are required.
Figure 12. READ PERMANENT WRITE PROTECTION
S T A R T RS ET AO D*P A C K L S B R/W *Theslavedoesnotprovideanacknowledgementifthepermanentwriteprotectionisalreadyenabled.
SDA Bus Activity
Device Address
M S B
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IS24C02C
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Vs Vp Tbias TsTg iouT Parameter Supply Voltage VoltageonAnyPin TemperatureUnderBias StorageTemperature OutputCurrent Value -0.5 to +6.5 -0.5toVcc+0.5 -55to+125 -65to+150 5 Unit V V C C mA
Notes: 1.StressgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamagetothedevice.Thisisastressratingonlyandfunctionaloperationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE
(IS24C02C-2) Range Industrial Ambient Temperature -40Cto+85C VCC 1.7Vto3.6V
CAPACITANCE(1,2)
Symbol Cin CouT Parameter Input Capacitance OutputCapacitance Conditions Vin = 0V VouT = 0V Max. 6 8 Unit pF pF
Notes: 1.Testedinitiallyandafteranydesignorprocesschangesthatmayaffecttheseparameters. 2. Testconditions:Ta = 25C, f=400KHz,Vcc=3.0V.
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IS24C02C
DC ELECTRICAL CHARACTERISTICS
Industrial(Ta=-40oC to +85oC)
Symbol Vol1 Vol2 Vih Vil VhV ili ilo Parameter OutputLowVoltage OutputLowVoltage Input High Voltage InputLowVoltage A0 High Voltage InputLeakageCurrent OutputLeakageCurrent Test Conditions VCC = 1.7V, iol = 0.15mA VCC = 3.6V, iol = 2.1mA Min. Max. -- 0.2 -- 0.4 VCC x 0.7 VCC + 0.5 -1.0 VCC x 0.3 7 10 -- 3 -- 3 Unit V V V V V A A
VhV - VCC > 4.8V Vin = VCC max.
Notes: Vil min and Vih max are reference only and are not tested.
POWER SUPPLY CHARACTERISTICS
Industrial(Ta=-40oC to +85oC)
Symbol iCC1 iCC2 isb1 isb2 Parameter VccOperatingCurrent VccOperatingCurrent StandbyCurrent StandbyCurrent Test Conditions Readat100KHz(Vcc=3.6V) Writeat100KHz(Vcc=3.6V) Vcc=1.7V Vcc=3.6V Min. -- -- -- -- Max. 1.0 3.0 1 2 Unit mA mA A A
AC ELECTRICAL CHARACTERISTICS
Industrial(Ta=-40oC to +85oC)
1.7V Vcc 3.6V Symbol fsCl T tlow thigh tbuf tsu:sTa tsu:sTo thd:sTa thd:sTo tsu:daT thd:daT tsu:wp thd:wp tdh taa tr tf twr Parameter SCLClockFrequency NoiseSuppressionTime(1) ClockLowPeriod ClockHighPeriod (1) BusFreeTimeBeforeNewTransmission StartConditionSetupTime StopConditionSetupTime StartConditionHoldTime StopConditionHoldTime DataInSetupTime DataInHoldTime WPpinSetupTime WPpinHoldTime DataOutHoldTime(SCLLowtoSDADataOutChange) ClocktoOutput(SCLLowtoSDADataOutValid) SCLandSDARiseTime(1) (1) SCLandSDAFallTime WriteCycleTime Min. Max. 0 400 -- 50 1.2 -- 0.6 -- 1.2 -- 0.6 -- 0.6 -- 0.6 -- 0.6 -- 100 -- 0 -- 0.6 -- 1.2 -- 50 -- 50 900 -- 300 -- 300 -- 5 Unit KHz ns s s s s s s s ns ns s s ns ns ns ns ms
Note: 1.Theseparametersarecharacterized,butnot100%tested.
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IS24C02C
FIGURE 13. AC WAVEFORMS
tR
tF
tHIGH
tLOW
tSU:STO
SCL
tSU:STA tHD:STA tHD:DAT tSU:DAT tBUF
SDAIN
tAA tDH
SDAOUT
tSU:WP
tHD:WP
WP
FIGURE 14. WRITE CYCLE TIMING
SCL
SDA
8th BIT WORD n
ACK
tWR
STOP Condition START Condition
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IS24C02C
ORDERING INFORMATION Industrial Range: -40C to +85C, Lead-free
Voltage Range 1.7V to3.6V Part Number IS24C02C-2GLI IS24C02C-2ZLI IS24C02C-2PLI IS24C02C-2SLI IS24C02C-2DLI Package* 8-pin150-milSOIC(JEDECSTD) 8-pinTSSOP(3mmx4mm) 8-pin300-milPDIP 8-pin120-milMSOP 8-padDFN(2mmx3mm)
*Contact ISSI Sales Rep for availability
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IS24C02C
150-mil Plastic SOP Package Code: G, GR
N
E
H
1 D
SEATING PLANE
A
e B
A1
L
C
Symbol Ref. Std. No. Leads A A1 B C D E H e L
150-mil Plastic SOP (G, GR) Min Max Min Max Inches mm 8 8 -- 0.068 -- 1.73 0.004 0.009 0.1 0.23 0.013 0.020 0.33 0.51 0.007 0.010 0.18 0.25 0.189 0.197 4.8 5 0.150 0.157 3.81 3.99 0.228 0.245 5.79 6.22 0.050 BSC 1.27 BSC 0.020 0.035 0.51 0.89
Notes: 1. Controlling dimension: inches, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
measured from the bottom of the package.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00C 03/18/2008
17
IS24C02C
Thin Shrink Small Outline TSSOP Package Code: Z (8 pin, 14 pin)
N
E1
E
1 D
N/2
A1
L
A2
A
C
e B
TSSOP (Z) Ref. Std. JEDEC MO-153 No. Leads 8 Millimeters Inches Symbol Min Max Min Max A -- 1.20 -- 0.047 A1 0.05 0.15 0.002 0.006 A2 0.80 1.05 0.032 0.041 B 0.19 0.30 0.007 0.012 C 0.09 0.20 0.004 0.008 D 2.90 3.10 0.114 0.122 E1 4.30 4.50 0.169 0.177 E 6.40 BSC 0.252 BSC e 0.65 BSC 0.026 BSC L 0.45 0.75 0.018 0.030 -- 8 -- 8
TSSOP (Z) Ref. Std. JEDEC MO-153 No. Leads 14 Millimeters Inches Symbol Min Max Min Max A -- 1.20 -- 0.047 A1 0.05 0.15 0.002 0.006 A2 0.80 1.05 0.031 0.041 B 0.19 0.30 0.007 0.012 C 0.09 0.20 0.0035 0.008 D 4.90 5.10 0.193 0.201 E1 4.30 4.50 0.170 0.177 E 6.40 BSC 0.252 BSC e 0.65 BSC 0.026 BSC L 0.45 0.75 0.0177 0.0295 -- 8 -- 8
18
Rev B 02/01/02
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00C 03/18/2008
IS24C02C 300-mil Plastic DIP Package Code: N,P
N E1 1 D S B1 SEATING PLANE E
S
A
L FOR 32-PIN ONLY A1 e B B2
C eA
MILLIMETERS Sym.
N0. Leads A A1 B B1 B2 C D E E1 eA e L S
INCHES Min. Max.
Notes: 1. Controlling dimension: inches, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
Min.
8
Max.
be measured from the bottom of the package.
3.68 0.38 0.36 1.14 0.81 0.20 9.12 7.62
6.20 8.13 3.18 0.64
4.57 -- 0.56 1.52 1.17 0.33
9.53 8.26
6.60 9.65 -- 0.762
0.145 0.015 0.014 0.045 0.032 0.008 0.359 0.300
0.244 0.320 0.125 0.025
0.180 -- 0.022 0.060 0.046 0.013
0.375 0.325
0.260 0.380 -- 0.030
2.54 BSC
0.100 BSC
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00C 03/18/2008
19
IS24C02C
PlasticMSOP Package Code: S
N
E1
E
1 D
SEATING PLANE
A
e B
A1
L
C
Ref. Std. No. Leads
Plastic MSOP (S) JEDEC MO 187 8 (120 mil) Millimeters Min Max 0.97 1.10 0.05 0.15 0.25 0.40 0.13 0.23 2.90 3.10 4.90BSC 2.90 3.10 0.65BSC -- 0.55 -- 7
Notes: 1. Controlling dimension: inches, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E do not include mold flash protrusions and should be measured 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
Inches Symbol Min Max A 0.038 0.043 A1 0.002 0.006 B 0.010 0.016 C 0.005 0.009 D 0.114 0.122 E 0.193 BSC E1 0.114 0.122 e 0.0256BSC L -- 0.022 -- 7
from the bottom of the package.
20
Rev. D 02/01/02
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00C 03/18/2008
IS24C02C
Dual Flat No-Lead Package Code: D (8-pad)
A
D2
b (8X)
E2
tie bars(3)
E
Pad 1 ID
L (8X)
D A2 A3 A1
e (6X) 1.50 REF.
Pad 1 index area
DFN
MILLIMETERS Sym.
N0. Pad D E D2 E2 A A1 A2 A3 L e b 0.18 0.30 1.50 1.60 0.70 0.0 --
Min. Nom. Max.
8 2.00 BSC 3.00 BSC -- -- 0.75 0.02 -- 0.20 REF 0.40 0.50 BSC 0.25 0.30 0.50 1.75 1.90 0.80 0.05 0.75
Notes: 1. Refer to JEDEC Drawing MO-229. 2. This is the metallized terminal and is measured between 0.18 mm and 0.30 mm from the terminal tip. The terminal may have a straight end instead of rounded. 3. Package may have exposed tie bars, ending flush with package edge.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00C 03/18/2008
21
IS24C02C
REVISION HISTORY:
Version 00C Date March2008 Description Released Version
22
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00C 03/18/2008

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